World-first sub-1nm logic transistor demonstrated

IBM Research — IBM demonstrated the world's first sub-1nm (0.7nm / 7Å "nanostack") logic transistor architecture, experimentally validated at the 2026 VLSI Symposium with functional CMOS inverters and ~100B transistors on a fingernail-sized die. A research milestone — not a product: IBM is still scaling 2nm and sees production as early as ~5 years out. (Aggregator coverage conflated this with the separate 'Anderon' quantum-chip foundry plan.)